RayPCB Engineering Tools
Configure your PCB layer structure and thicknesses
The SIG-GND-PWR-SIG configuration provides excellent signal integrity with a solid ground reference for L1 signals and good power delivery. Recommended for most mixed-signal designs.
Common stackup configurations and specifications
| Layer | Standard 1.6mm | High-Speed | Power-Heavy |
|---|---|---|---|
| L1 (Top) | Signal - 1oz | Signal - 1oz | Signal - 2oz |
| Prepreg | 0.20mm (7628) | 0.10mm (1080) | 0.20mm (7628) |
| L2 | GND Plane - 1oz | GND Plane - 1oz | GND Plane - 2oz |
| Core | 1.00mm FR-4 | 0.80mm Rogers | 1.00mm FR-4 |
| L3 | PWR Plane - 1oz | PWR Plane - 1oz | PWR Plane - 2oz |
| Prepreg | 0.20mm (7628) | 0.10mm (1080) | 0.20mm (7628) |
| L4 (Bottom) | Signal - 1oz | Signal - 1oz | Signal - 2oz |
| Total | ~1.60mm | ~1.20mm | ~1.80mm |
L1 and L4 trace impedance
L2/L3 embedded trace impedance
Edge-coupled microstrip and stripline differential impedance
USB 2.0: 90Ω ±10% | USB 3.0: 90Ω ±10% | HDMI: 100Ω ±15% | Ethernet: 100Ω ±15% | LVDS: 100Ω ±10%
Standard via connecting all layers
Connects outer to adjacent inner layer
Blind vias require laser drilling and increase manufacturing cost by 30-50%. Use only when necessary for HDI designs.
Connects inner layers only, invisible from outside
Through-Hole: Standard, lowest cost, use whenever possible
Blind Via: For high-density BGA fanout, adds ~30-50% cost
Buried Via: Maximum routing density, adds ~50-100% cost, requires sequential lamination
Number of vias needed for different currents
| Via Size (Drill) | 1A | 2A | 3A | 5A |
|---|---|---|---|---|
| 0.20 mm (8 mil) | 1-2 | 3-4 | 5-6 | 8-10 |
| 0.30 mm (12 mil) | 1 | 2 | 3-4 | 5-6 |
| 0.40 mm (16 mil) | 1 | 1-2 | 2-3 | 4-5 |
| 0.50 mm (20 mil) | 1 | 1 | 2 | 3-4 |
* Based on 25µm plating, 1.6mm board, 10°C rise
Validate your design against manufacturing capabilities
Standard vs Advanced specifications
| Parameter | Standard | Advanced | HDI |
|---|---|---|---|
| Min Trace Width | 4 mil (0.1mm) | 3 mil (0.075mm) | 2 mil (0.05mm) |
| Min Spacing | 4 mil (0.1mm) | 3 mil (0.075mm) | 2 mil (0.05mm) |
| Min Via Drill (PTH) | 0.25mm (10 mil) | 0.20mm (8 mil) | 0.15mm (6 mil) |
| Min Blind Via | 0.15mm | 0.10mm | 0.075mm |
| Max Aspect Ratio | 8:1 | 10:1 | 12:1 |
| Min Annular Ring | 5 mil (0.125mm) | 4 mil (0.1mm) | 3 mil (0.075mm) |
| Solder Mask Dam | 4 mil (0.1mm) | 3 mil (0.075mm) | 2 mil (0.05mm) |
| Silkscreen Width | 6 mil (0.15mm) | 4 mil (0.1mm) | 4 mil (0.1mm) |
| Board Thickness | 0.8-2.4mm | 0.4-3.2mm | 0.4-3.2mm |
| Layer Registration | ±4 mil | ±3 mil | ±2 mil |
Estimate manufacturing costs and optimize your design
When to choose 4-layer PCB
| Factor | 2-Layer | 4-Layer | Cost Impact |
|---|---|---|---|
| Base Price (100×100mm, 10pcs) | ~$15-25 | ~$35-50 | +80-100% |
| Signal Integrity | Limited | Excellent | Better SI |
| EMI Performance | Poor | Good | -20dB EMI |
| Power Delivery | Traces only | Full planes | Better PDN |
| Routing Density | Low | Medium-High | 2x density |
| Board Size | Larger | Smaller possible | 30-50% smaller |
Consider 4-layer PCB when: working with high-speed signals (>50MHz), requiring controlled impedance, needing compact board size, using BGA packages, requiring low EMI emissions, or building power-sensitive analog circuits.
Expert tips for optimal performance
This is the most versatile configuration. L1 signals reference the solid GND on L2 for best signal integrity. Power plane on L3 provides low-inductance power delivery with GND as return path.
Never split the ground plane. Route all signals on L1 and L4 to avoid cutting the GND. A continuous ground plane is crucial for signal integrity and EMI control.
Place ground vias every 1/20 wavelength around the board edge and near high-speed signals. This creates a low-impedance connection between ground planes and reduces EMI.
Route critical high-speed signals on L1 (or L4) directly above the GND plane for optimal impedance control. Inner layers have higher Er variation and less predictable impedance.
Place 0.1µF capacitors within 3mm of IC power pins. Use multiple vias to connect cap pads to power and ground planes. Add bulk caps (10-47µF) near power entry points.
Keep analog circuits physically separated from digital. Use separate power supplies if possible. Route analog signals away from high-speed digital traces. Bridge analog and digital grounds at one point only.
When routing high-speed signals through vias, always place a ground via nearby (within 0.5mm) to provide a return path. Signal vias without ground vias cause impedance discontinuities.
Apply thermal relief to pads connected to power/ground planes for easier soldering. Use 4-spoke pattern with 10-12 mil width. Direct connections make hand soldering nearly impossible.
What to route on each layer
| Layer | Function | What to Route | Tips |
|---|---|---|---|
| L1 (Top) | Signal | Components, high-speed, critical traces | Primary routing layer, shortest traces |
| L2 | Ground Plane | Solid copper pour, minimal routing | Keep 100% fill, never split |
| L3 | Power Plane | VCC pour, split for multiple voltages | Star topology for splits, keep cuts away from signals |
| L4 (Bottom) | Signal | Secondary routing, low-speed, power traces | Route perpendicular to L1 when possible |
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